1. Field of the Invention
The present invention relates to a solid-state imaging device. In particular, the present invention relates to a solid-state imaging device, such as an interline transfer type solid-state imaging device, configured in such a manner that signal charge generated and accumulated in a photoelectric converting region is read via a charge-coupled device (CCD).
2. Description of the Related Art
Recently, a household video camera and digital camera using a solid-state imaging device is used widely. In these cameras, an interline transfer type solid-state imaging device is widely used, which reads signal charge generated and accumulated in a photoelectric converting region via a CCD. In such an interline transfer type solid-state imaging device, in order to reduce power consumption and allow a power source to be shared by the solid-state imaging device and a liquid crystal monitor mounted thereon, an attempt has been made to reduce a read voltage.
As an attempt to reduce a read voltage, a solid-state imaging device has been proposed in which, among a plurality of electric charge transfer electrodes constituting a vertical CCD, an electric charge transfer electrode that also functions as a reading gate for transmitting a signal charge generated and accumulated in a photoelectric converting region to the vertical CCD is configured so as to have an electrode length in a transfer direction longer than that of the other electric charge transfer electrodes (e.g., see JP 2950317). Hereinafter, a conventional interline transfer type solid-state imaging device with a reduced read voltage will be described.
FIG. 17 is a view schematically showing an overall configuration of a conventional interline transfer type solid-state imaging device. In FIG. 17, reference numeral 100 denotes a photodiode (PD) for performing photoelectric conversion. 200 denotes a vertical CCD for transferring signal charge in a vertical direction. 300 denotes a signal charge read portion for reading signal charge from the photodiode 100 to the vertical CCD 200. 400 denotes a horizontal CCD for transferring signal charge in a horizontal direction. 500 denotes an output portion for detecting and amplifying signal charge. Generally, a region “I” composed of the photodiode 100 for performing photoelectric conversion and the vertical CCD 200 is called a pixel.
The operation of the solid-state imaging device thus configured is performed schematically as follows. Each photodiode 100 generates and accumulates signal charge in accordance with the amount of incident light by photoelectric conversion. During a vertical blanking period after the elapse of a predetermined accumulation period, the signal charge accumulated in the photodiode 100 is read collectively to the adjacent vertical CCD 200 via the signal charge read portion 300. Then, the signal charge is transferred downward in FIG. 17 through a plurality of vertical CCDs 200 in parallel on a stage basis, and the signal charge is transferred from the final transfer stage of each vertical CCD 200 to the horizontal CCD 400 on a row basis. Then, the signal charge is transferred successively leftward in FIG. 17 through the horizontal CCD 400. The signal charge is converted to a voltage signal in the output portion 500, and thereafter, is output as a video signal in a temporal series.
FIG. 18A is a plan view showing a pixel configuration in the region “I” shown in FIG. 17. FIG. 18B is a cross-sectional view taken along a line II–II′ shown in FIG. 18A. In FIG. 18A or 18B, reference numeral 501 denotes a photoelectric converting region formed of an n type diffusion layer. 502 denotes a CCD channel region of the vertical CCD 200 formed of an n type diffusion layer. 503 denotes a first electric charge transfer electrode of the vertical CCD 200 formed of a first polysilicon layer. 504 denotes a second electric charge transfer electrode of the vertical CCD 200 formed of a second polysilicon layer. 505 denotes an electric charge read portion of the second electric charge transfer region 504, for reading electric charge from the photoelectric converting region 501. 506 denotes an n type semiconductor substrate. 507 denotes a p type well. 508 denotes a p type reading region for reading signal charge accumulated in the photoelectric converting region 501 to the CCD channel region 502. 509 denotes a p+ type device separation region for separating the photoelectric converting regions 501 and the CCD channel regions 502 from each other. 510 denotes a gate insulating film. 511 denotes an interlayer insulating film for insulating the first electric charge transfer electrode 503 from the second electric charge transfer electrode 504. In FIG. 18B, ΦV1, ΦV2, ΦV3, and ΦV4 denote transfer clocks.
The signal charge generated and accumulated in the photoelectric converting region 501 by photoelectric conversion is read to the CCD channel region 502 through the p type reading region 508 by applying a read pulse having a voltage amplitude of, for example, 8 to 15 V to the second electric charge transfer electrode 504. Thereafter, by applying a transfer pulse having a voltage amplitude of, for example, −5 to −8 V to the first electric charge transfer electrode 503 and the second electric charge transfer electrode 504, the signal charge is transferred from right to left in FIG. 18B through the CCD channel region 502. The impurity concentration in the p type reading region 508 is set to be an appropriate value in such a manner as follows: when a read pulse is applied to the second electric charge transfer electrode 504, the p type reading region 508 is conductive and completely transfers the signal charge in the photoelectric converting region 501 to the CCD channel region 502, and when a transfer pulse is applied to the first electric charge transfer electrode 503 and the second electric charge transfer electrode 504, and the signal charge is transferred through the CCD channel region 502, the p type reading region 508 is kept in a non-conducting state.
In order to read the electric charge accumulated in the photoelectric converting region 501 to the CCD channel region 502, it is required that the amplitude of a voltage to be applied to the second electric charge transfer electrode 504 is 15 V or less due to the constraint of a driving circuit. Herein, when a width W (FIG. 18A) of the electric charge read portion 505 of the second electric charge transfer electrode 504 is narrow, which is defined by the device separation region 509 and the first electric charge transfer electrode 503, the p type reading region 508 is unlikely to be conducted due to a narrow channel effect to increase a read voltage.
In order to solve the above-mentioned problem, in a conventional solid-state imaging device, the width W of the electric charge read portion 505 is enlarged to such a degree that a narrow channel effect does not occur remarkably. More specifically, as shown in FIG. 18B, the electric charge read portion 505 is formed so that an electrode length L1 of the second electric charge transfer electrode 504 that also functions as a reading gate is set to be longer than an electrode length L2 of the first electric charge transfer electrode 503.
In general, the transfer efficiency of a CCD is determined mainly by a fringe electric field generated between transfer electrodes. In particular, the transfer efficiency largely depends upon a minimum electric field under a transfer electrode. As the minimum electric field becomes larger, a time (transfer time) required for transfer becomes shorter, whereby the transfer efficiency is enhanced.
FIG. 19A is a cross-sectional view partially showing the vertical CCD shown in FIG. 18B. FIG. 19B shows a potential distribution in the channel region at an intermediate voltage while the vertical CCD is driven with four-phase transfer clocks of ΦV1, ΦV2, ΦV3, and ΦV4, whereby the first electric charge transfer electrode 503 supplied with ΦV2 changes from a middle level voltage VVM to a low level voltage VVL. FIG. 19C shows a potential distribution in the channel region at an intermediate voltage while the second electric charge transfer electrode 504 supplied with ΦV1 changes from the middle level voltage VVM to the low level voltage VVL. In FIGS. 19B and 19C, a potential is shown with the downward direction being positive.
As shown in FIG. 19A, in the conventional solid-state imaging device, in order to reduce a read voltage, the electrode length L1 of the second electric charge transfer electrode 504 is set to be longer than the electrode length L2 of the first electric charge transfer electrode 503. Therefore, a minimum electric potential 512 under the second electric charge transfer electrode 504 supplied with ΦV1 appears at the center portion of the second electric charge transfer electrode 504 whose electrode length is formed long, as shown in FIG. 19C, and its value is decreased as the electrode length L1 is longer.
Thus, in the conventional solid-state imaging device, as the electrode length L1 of the second electric charge transfer electrode 504 is increased so as to reduce a read voltage, the minimum electric field becomes weak, decreasing the transfer efficiency.